(1) Field of the Invention
The present invention relates to a multi-layer printed wiring boards (PWB) and more particular, to a method of making multi-layer PWB suitable for use in an up-to-date electronic equipment requiring high-speed operation.
(2) Description of the Prior Art
A multi-layer PWB has found application in variety of electronic equipment, such as computers, electronic switching system and so on. As is well known, in the field of the high-speed pulse circuits, impedance matching is required at the transmitting end for transmitting pulses, a signal line for propagating the pulses and receiving end for receiving the pulses. Otherwise, a spurious signal called "ringing" would be generated in a pulse waveform. In a logic network in which a plurality of pulse waveforms are combined and processed, the above-mentioned ringing causes abnormal operation by the generation of hazard (whisker-shaped pulses) due to deviation in relative timing between the respective pulses. Especially in equipment using super high-speed devices called ECL (Emitted Coupled Logic) or CML (Current Mode Logic) connected with a multi-layer PWB, fluctuations of a characteristic impedance of a signal line of the multi-layer PWB should be made as small as possible to facilitate the design of the equipment.
FIGS. 1A to 1C show a conventional process for making a conventional multi-layer PWB in cross-sectional views, where an internal printed wiring board 20 is sandwiched between a pair of external printed wiring boards 100. The internal PWB 20 has a structure such that a pair of circuit patterns 22 and 24 are provided on principal surfaces of an insulative plate 2. These circuit patterns 22 and 24 are electrically connected via a through-hole 23. In the first step, as shown in FIG. 1A, external substrates 1 have outer conductive layers 102 on the outside surfaces, respectively. Internal surfaces of the substrates 1 are provided with inner conductive layers 101, respectively. Each of the inner conductive layers 101 has a predetermined pattern so as to form a ground layer or power layer by using a photoetching process or the like. In a process of laminating three PWBs, a necessary number of insulative sheets such as prepreg sheets 3 are interposed between the internal PWB 20 and inner conductive layers 101, respectively. The resultant laminated structure is then drilled at desired position to form through-holes 5. Thereafter, inside surfaces of the through-holes 5 and outer conductive layers 102 are subjected to plating to form through-hole plating layers 6 as shown in FIG. 1B. Then, as shown in FIG. 10 external circuit patterns 7 are formed respectively through a photo-etching process. In this example, a multi-layer PWB 8 of six conductive layers is achieved as shown in FIG. 1C.
In a conventional multi-layer PWB, however, it is difficult to keep the principal surfaces of internal conductive layers 101 in a flat state parallel to the principal surfaces of internal PWB 20. As is shown in FIGS. 1B and 1C, the internal conductive layers 101 tend to wave. Such a waved circuit pattern causes undesirable fluctuations of a characteristic impedance of a signal line of the internal PWB 20.
Another important factor for the fluctuation of the characteristic impedance of a signal line is the width of circuit pattern. When an internal PWB 20 has a through-hole 23 with a land 25, the difference in width of the land 25 and the signal line connected thereto causes a large fluctuation of characteristic impedance. The influence of the difference in width becomes more significant when the signal pattern is located near a ground layer or power layer which extends over the entire area of a multi-layer PWB. When the fluctuation of characteristic impedance becomes large it becomes difficult to design equipment for high-speed operation.